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Silicon Labs /Series1 /MGM12 /MGM12P32F1024GA /ETM /ETMCCER

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Interpret as ETMCCER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EXTINPSEL 0EXTINPBUS0 (READREGS)READREGS 0 (DADDRCMP)DADDRCMP 0INSTRES 0EICEWPNT 0 (TEICEWPNT)TEICEWPNT 0 (EICEIMP)EICEIMP 0 (TIMP)TIMP 0 (RFCNT)RFCNT 0 (TENC)TENC 0 (TSIZE)TSIZE

Description

Configuration Code Extension Register

Fields

EXTINPSEL

Extended External Input Selectors
EXTINPBUS

Extended External Input Bus
READREGS

Readable Registers
DADDRCMP

Data Address comparisons
INSTRES

Instrumentation Resources
EICEWPNT

EmbeddedICE watchpoint inputs
TEICEWPNT

Trace Sart/Stop Block Uses EmbeddedICE watchpoint inputs
EICEIMP

EmbeddedICE Behavior control Implemented
TIMP

Timestamping Implemented
RFCNT

Reduced Function Counter
TENC

Timestamp Encoding
TSIZE

Timestamp Size

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data